Author Archives: haakonks

New hardware from Nvidia in the lab!

Nvidia has kindly sent ut a couple of Jetson TK1 development boards!

The Jetson boards uses the new Tegra K1 SoC from Nvidia with what Nvidia call a 4-Plus-1 quad-core ARM Cortex-A15. This means that you have four high-performance ARM cores, and one low-power companion core. The really exiting news with the Tegra K1 is the GPU. The chip now has a 192-core full Kepler SMX, and the board supports CUDA, OpenCL and OpenGL. The same APIs as a standard Nvidia desktop GPU. For more information about the Tegra K1, check this web-page at Nvidia.

Jetson TK1 development kit from Nvidia


The boards come with Nvidia’s Linux for Tegra (L4T) distribution which is based on Ubuntu. More specifications about the board can be found here and here.

For access to the boards, contact Håkon.

An extended version of the Bagadus ISM paper accepted for IJSC

An extended version of the ISM paper about the real-time panorama recording pipeline in Bagadus has been accepted to be published in International Journal of Semantic Computing (IJSC). The paper has the title “Efficient Implementation and Real-time Processing of Panorama Video” and is authored by Håkon Kvale Stensland, Vamshidar Reddy Gaddam, Marius Tennøe, Espen Helgedagsrud, Mikkel Næss, Henrik Kjus Alstad, Carsten Griwodz, Pål Halvorsen and Dag Johansen.



There are many scenarios where high resolution, wide field of view video is useful. Such panorama video may be generated using camera arrays where the feeds from multiple cameras pointing at different parts of the captured area are stitched together. However, processing the different steps of a panorama video pipeline in real-time is challenging due to the high data rates and the stringent timeliness requirements. In our research, we use panorama video in a sport analysis system called Bagadus. This system is deployed at Alfheim stadium in Tromsø, and due to live usage, the video events must be generated in real-time. In this paper, we describe our real-time panorama system built using a low-cost CCD HD video camera array. We describe how we have implemented different components and evaluated alternatives. The performance results from experiments ran on commodity hardware with and without co-processors like graphics processing units (GPUs) show that the entire pipeline is able to run in real-time.

New hardware from Intel

The first Intel Xeon Phi coprocessor have finally arrived!

Xeon Phi is a coprocessor that works the same way as a GPU running GPGPU code. The Xeon Phi does not however have a display output. The model we got from Intel is the 3120A with 57 simple x86 cores (running at 1,1 GHz) based in Intel’s old P54C core also known as the first Pentium CPU. The P54C retain its in-order pipeline, but the core has been updated with support for 64-bit extensions (x86-64) and Intel have also added support for 4-way Hyper Threading (SMT). To be able to deliver high performance, each core has also been fitted with a 512-bit SIMD pipeline.

Since these cores support x86, most applications will run only with a recompile, however, if you want the applications to have good performance you have to adapt to the architecture. More details about the Xeon Phi can be found in the architecture reference manual. Our card has 6GB of RAM and will be installed in the machine “Lincoln”. Since the cores on the Xeon Phi are standard x86 cores with cache coherency, the Xeon Phi runs a Linux operating system on the chip.

Bagadus: An Integrated System for Soccer Analysis

Bagadus is a prototype of a soccer analysis application which integrates a sensor system, soccer analytics annotations and video processing of a video camera array. The prototype is currently installed at Alfheim Stadium in Norway, and we demonstrate how the system can follow and zoom in on particular player(s), and playout events from the games using the stitched panorama video and/or the camera switching mode.

A demo paper on Bagadus has been accepted to ICDSC 2012: 6th ACM/IEEE International Conference on Distributed Smart Cameras in Hong Kong.

See the demo video at YouTube.


In what has become a tradition, several people from the Media Performance Group attended this years NOSSDAV workshop (Network and Operating Support for Digital Audio and Video). This year the NOSSDAV workshop was hosted at University of Toronto in Ontario, Canada.

The Horseshoe Falls at Niagara Falls

It was three of us participating at this years NOSSDAV, and as usual we had different routes planed. Pål was flying directly to Toronto via Iceland. Me (Håkon) and Håvard were flying to New York City.
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MPG at the 2012 ACM Multimedia Systems Conference

The SAS Airbus A340 on approach to IAD

This year as last year, the Media Performance Group attended the ACM MMSys conference. This year the conference was hosted at University of North Carolina at Chapel Hill. This year we had one dataset paper accepted (Network Traffic from Anarchy Online: Analysis, Statistics and Applications) and one full-paper accepted to the MoVid 2012 workshop (A Comparison of Quality Scheduling in Commercial Adaptive HTTP Streaming Solutions on a 3G Network) which was co-located with ACM MMSys. All these papers should now be available in the ACM Digital Library and our web-pages. Read more

February 2012 Breakfast Meeting @ iAD Lab

Participants at the Meeting
The February 2012 breakfast meeting at the iAD Lab was about our view and experience around social and collaborative training- and learning environments – and how technology plays a vital part in this (r)evolution. About 30 persons showed up at the iAD Lab @ IFI on a early Wednesday morning to participate in this meeting!
Participants at the Meeting

Participants on the meeting

Lars Sverre Gjølme from Accenture shared his experience based on work done with various clients, highlighting some of the issues we believe are critical for the better,smarter and faster eTraining. Eilin Schjetne – head of Business implementation in the Business Development unit of DNB did a presentation on how they recently developed a brand new digital training platform. The system was also demoed for the audience.

Professor Pål Halvorsen from the University of Oslo commented on how search technology can play a vital part when “learning objects” becomes more multimedia oriented, and also gave the participants a brief introduction of iAD’s vision of the next generation platform for search and collaboration. Slides from the presentations will be available for the iAD webpage.

INF5063 Asymmetric Multicore Challenge 2011

At the 15th of December 2011 is was time for the 2011 version of the INF5063 Asymetric Multicore Challenge! This was the 4th year of this now traditional competition.

This event is a competition open for students in the INF5063 course. Each contestant compete in encoding the tractor video as fast as possible on the GPU and the Cell Broadband Engine. There are off course several rules in this comeptition, the encoded video must not deviate significantly from the reference encoder (precode), motion estimation and other algorithms may be changed, e.g. with diamond search or FastDCT, etc. Normally there is a price (a bottle of single malt Whisky) for each group member sponsored by the Media Group at Simula Research Laboratory for the best group on Cell and GPU. This year, there was also a consolation prize sponsored by the iAD Lab at the University of Oslo. This price (a special made t-shirt) was for all the groups that entered into the competition.

The lucky winners of INF5063 Asymmetric Multicore Challenge 2011

This year, three groups participated both on GPU and on Cell, and as all the earier years, no group managed to win both the architectures. After a tense wait, while the results were presented, the winners were announced. On Cell, Kjetil Raaen & Marius Brendmoe delivered the fastest implementation, and on GPU David Kai Christen Kristensen & Anders Grotthing Moe had the fastest entry!

MPG gets access to new Dolphin Express cards

MPG is working with Dolphin Interconnect Solutions to test their new “PCI Express over cable” interconnect cards.

These cards extend the PCI Express bus of a machine, and with a switch you can connect several machines together. The initial setup in our lab consists of two machines connected together with a single cable. The cards have pretty some impressive specifications. The bandwidth is over 2800 Megabytes per second, and a one-way application to application latency of 0,73 microseconds (our setup has beaten Dolphins record…).

There are several APIs available to use these cards: low-level APIs like SCISI for doing low-level shared memory programming, and a Berkley socket implementation. There is also an MPI implementation available. This setup will be used by the P2G project to experiment with the communication module of the distributed version of the framework. Other MPG projects are also welcome to play with the hardware!